Invention Grant
- Patent Title: Display device
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Application No.: US15427103Application Date: 2017-02-08
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Publication No.: US10062716B2Publication Date: 2018-08-28
- Inventor: Atsushi Umezaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2006-269689 20060929
- Main IPC: G09G3/36
- IPC: G09G3/36 ; H01L27/12 ; G02F1/1333 ; G02F1/1362 ; G09G3/3266 ; G11C19/28 ; H01L27/105 ; G02F1/1368 ; H01L29/786 ; G02F1/1345 ; G02F1/1343 ; H01L27/13 ; H01L27/32 ; H01L29/423

Abstract:
By applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.
Public/Granted literature
- US09905584B2 Display device Public/Granted day:2018-02-27
Information query
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