Circuit configurations and related methods are provided that may be implemented using insulated-gate bipolar transistor (IGBT) device circuitry to protect at risk circuitry (e.g., such as high voltage output buffer circuitry or any other circuitry subject to undesirable ESD events) from damage due to ESD events that may occur during system assembly. The magnitude of the trigger voltage VT1 threshold for an IGBT ESD protection device may be dynamically controlled between at least two different values so that trigger voltage VT1 threshold for an IGBT ESD protection device may be selectively reduced when needed to better enable ESD operation.