The present disclosure discloses a PCB processing method and a PCB. The method includes: respectively carrying out laminating processing on a plurality of PCB daughter boards constituting a PCB, and drilling and electroplating the top-most PCB daughter board to form a via hole; and laminating the plurality of PCB daughter boards together to form the PCB, and drilling and electroplating the formed PCB to form a through hole for mounting a connector, wherein a blind hole for mounting a connector is formed by the via hole, and a depth of the blind hole is greater than or equal to the length of a signal pin of the connector. By virtue of the technical scheme of the present disclosure, a space between wafers of the lower layer of PCBs may be doubled, and the space for layout between wafers may be doubled.