Two-step self-test circuit for microcontroller unit and antenna
Abstract:
A system is disclosed. The system includes an antenna and a processor. The processor has at least four ports: a first input port coupled to a first portion of the continuity component; a first output port coupled in series to a first resistor coupled to the first portion of the antenna and to ground via a second resistor; a second output port coupled through a third resistor to the first portion of the antenna; and a second input port coupled to a second portion of the antenna and through a fourth resistor to ground. The processor is operable to activate and deactivate the appropriate ports to put the processor in one of three operating modes: an AC detection mode, an AC self-test mode, and a continuity test mode.
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