A system for characterising a NOR flash memory cell provided with a floating gate transistor, includes a voltage generator having an output connected to the gate electrode that generates as output an erase signal; and a dynamic measurement apparatus including a first channel connected to the gate electrode and a second channel connected to the drain electrode. The dynamic measurement apparatus generates on the first and second channels write signals and measures a current flowing in the drain electrode during the writing of the memory cell. Only the gate electrode of the floating gate transistor is connected to the voltage generator and to the dynamic measurement apparatus by a CMOS switch, which switches between a first position, where the output of the voltage generator is electrically coupled to the gate electrode, and a second position, where the first channel of the measurement device is electrically coupled to the gate electrode.