Invention Grant
- Patent Title: Handling unaligned load operations in a multi-slice computer processor
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Application No.: US14966075Application Date: 2015-12-11
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Publication No.: US10067763B2Publication Date: 2018-09-04
- Inventor: Sundeep Chadha , Robert A. Cordes , David A. Hrusecky , Hung Q. Le , Jentje Leenstra , Dung Q. Nguyen , Brian W. Thompto , Albert J. Van Norstrand, Jr.
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Kennedy Lenart Spraggins LLP
- Agent Joseph D. Downing; Robert R. Williams
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F9/30 ; G06F12/0813 ; G06F12/0842 ; G06F12/0875 ; G06F12/0862 ; G06F13/16 ; G06F13/42

Abstract:
Handling unaligned load operations, including: receiving a request to load data stored within a range of addresses; determining that the range of addresses includes addresses associated with a plurality of caches, wherein each of the plurality of caches are associated with a distinct processor slice; issuing, to each distinct processor slice, a request to load data stored within a cache associated with the distinct processor slice, wherein the request to load data stored within the cache associated with the distinct processor slice includes a portion of the range of addresses; executing, by each distinct processor slice, the request to load data stored within the cache associated with the distinct processor slice; and receiving, over a plurality of data communications busses, execution results from each distinct processor slice, wherein each data communications busses is associated with one of the distinct processor slices.
Public/Granted literature
- US20170168823A1 HANDLING UNALIGNED LOAD OPERATIONS IN A MULTI-SLICE COMPUTER PROCESSOR Public/Granted day:2017-06-15
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