- Patent Title: Systems and methods for adaptive error corrective code mechanisms
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Application No.: US14560767Application Date: 2014-12-04
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Publication No.: US10067823B2Publication Date: 2018-09-04
- Inventor: Ashish Singhai , Ashwin Narasimha , Ajith Kumar
- Applicant: HGST Netherlands B.V.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: McDermott Will & Emery LLP
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/52

Abstract:
Systems and methods for managing the endurance of a solid state drive by assigning error corrective codes (ECC) to a plurality of solid state drive blocks are provided. The disclosed systems and methods can provide a plurality of error corrective codes, each code having a corresponding correction capability and assign to each solid state drive block an error corrective code, according to a reliability of the solid state drive block. Moreover, the disclosed systems and methods can group the solid state drive blocks into groups according to their assigned error corrective codes and apply, for each group of solid state drive block, a level of ECC correction according to the assigned error corrective code of each group.
Public/Granted literature
- US20160162352A1 SYSTEMS AND METHODS FOR ADAPTIVE ERROR CORRECTIVE CODE MECHANISMS Public/Granted day:2016-06-09
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