Invention Grant
- Patent Title: Compression and caching for logical-to-physical storage address mapping tables
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Application No.: US15183657Application Date: 2016-06-15
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Publication No.: US10067881B2Publication Date: 2018-09-04
- Inventor: Kien Pham , Gunter Knestele , Janak Koshia , Maliheh Sarikhani , Jeffrey Furlong
- Applicant: HGST Netherlands B.V.
- Applicant Address: US CA San Jose
- Assignee: Western Digital Technologies, Inc.
- Current Assignee: Western Digital Technologies, Inc.
- Current Assignee Address: US CA San Jose
- Agency: McDermott Will & Emery LLP
- Main IPC: G06F12/10
- IPC: G06F12/10 ; G06F12/1027 ; G06F12/02 ; G06F12/1009

Abstract:
A storage device that maps logical addresses to physical addresses includes a memory that stores machine instructions and a processor coupled to the memory that executes the machine instructions to store a compressed mapping table in the memory. The compressed mapping table correlates logical addresses to locations in a storage. The storage device also stores a bundle of uncompressed mapping table entries starting at a first location in a cache and maps a first logical address associated with the uncompressed mapping table entry to the first location.
Public/Granted literature
- US20170364446A1 COMPRESSION AND CACHING FOR LOGICAL-TO-PHYSICAL STORAGE ADDRESS MAPPING TABLES Public/Granted day:2017-12-21
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