Invention Grant
- Patent Title: Programmable logic device design implementations with multiplexer transformations
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Application No.: US15374994Application Date: 2016-12-09
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Publication No.: US10068045B1Publication Date: 2018-09-04
- Inventor: Sabyasachi Das , Chiwei Huang
- Applicant: Xilinx, Inc.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent LeRoy D. Maunu
- Main IPC: G06F17/50
- IPC: G06F17/50
Abstract:
A programmable logic design is generated for a programmable logic device (PLD) containing configurable logic blocks (CLBs) each having a plurality of multiplexers and look-up-table (LUT) circuits. A first subset of multiplexers are identified from the plurality of multiplexers based upon an analysis of design definitions for input signals of the plurality of multiplexers. The first subset of multiplexers are transformed into LUT logic. Configuration data is generated that is designed to be loaded into the PLD to configure the CLBs. The configuration data includes the LUT logic.
Information query
