Invention Grant
- Patent Title: Doped poly-silicon for PolyCMP planarity improvement
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Application No.: US15860308Application Date: 2018-01-02
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Publication No.: US10068988B2Publication Date: 2018-09-04
- Inventor: William Weilun Hong , Po-Chin Nien , Ying-Tsung Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L29/06 ; H01L27/088 ; H01L27/11 ; H01L29/66
Abstract:
A method includes forming a polysilicon layer with an uneven upper surface over a first region and a second region of a substrate, doping a top portion of the polysilicon layer to change its removal rate, thereby forming a doped layer, and removing the doped layer in the first region to expose the polysilicon layer in the first region and leaving at least a portion of the doped layer in the second region. The method also includes removing the exposed polysilicon layer in the first region at a first removal rate and the doped layer in the second region at a second removal rate, the polysilicon layer in the second region being exposed after the doped layer in the second region is removed, and removing the polysilicon layer in the first region and the second region at a third removal rate and a fourth removal rate, respectively.
Public/Granted literature
- US20180145152A1 DOPED POLY-SILICON FOR POLYCMP PLANARITY IMPROVEMENT Public/Granted day:2018-05-24
Information query
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