Invention Grant
- Patent Title: Memory element and memory device
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Application No.: US13444177Application Date: 2012-04-11
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Publication No.: US10079053B2Publication Date: 2018-09-18
- Inventor: Takuro Ohmaru , Yukio Maehashi
- Applicant: Takuro Ohmaru , Yukio Maehashi
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JP2011-096609 20110422; JP2011-112693 20110519
- Main IPC: G11C14/00
- IPC: G11C14/00 ; G11C11/412

Abstract:
An object is to provide a memory element having a novel structure where data can be held even after power supply is stopped. The memory element includes a latch circuit, a first selection circuit, a second selection circuit, a first nonvolatile memory circuit, and a second nonvolatile memory circuit. The first nonvolatile memory circuit and the second nonvolatile memory circuit each include a transistor and a capacitor. The transistor included in each of the first nonvolatile memory circuit and the second nonvolatile memory circuit is a transistor in which a channel is formed in an oxide semiconductor film. The off-state current of such a transistor is extremely small. The transistor is turned off after data is input to a node where the transistor and the capacitor are connected to each other, and data can be held for a long time even after supply of power supply voltage is stopped.
Public/Granted literature
- US20120271984A1 MEMORY ELEMENT AND MEMORY DEVICE Public/Granted day:2012-10-25
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