Invention Grant
- Patent Title: Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region
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Application No.: US14225152Application Date: 2014-03-25
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Publication No.: US10079314B2Publication Date: 2018-09-18
- Inventor: Sagy Charel Levy , Frederick B. Jenne , Krishnaswamy Ramkumar
- Applicant: Cypress Semiconductor Corporation
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L29/51 ; H01L21/28 ; H01L29/66
Abstract:
A nonvolatile charge trap memory device is described. The device includes a substrate having a channel region. A gate stack is disposed above the substrate over the channel region. The gate stack includes a multi-layer charge-trapping region having a first deuterated layer. The multi-layer charge-trapping region may further include a deuterium-free charge-trapping layer.
Public/Granted literature
- US20140264550A1 Nonvolatile Charge Trap Memory Device Having a Deuterated Layer in a Multi-Layer Charge-Trapping Region Public/Granted day:2014-09-18
Information query
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