Invention Grant
- Patent Title: Optical metrology with purged reference chip
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Application No.: US14809054Application Date: 2015-07-24
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Publication No.: US10082461B2Publication Date: 2018-09-25
- Inventor: Andrew S. Klassen , Andrew J. Hazelton , Andrew H. Barada , Todd M. Petit , Chuan Sheng Tu
- Applicant: Nanometrics Incorporated
- Applicant Address: US CA Milpitas
- Assignee: Nanometrics Incorporated
- Current Assignee: Nanometrics Incorporated
- Current Assignee Address: US CA Milpitas
- Agency: Silicon Valley Patent Group LLP
- Main IPC: G01N21/01
- IPC: G01N21/01 ; G01N21/88 ; G01N21/94 ; G01N21/47 ; G01N21/15 ; G03F7/20

Abstract:
An integrated metrology module includes a chuck for holding a sample and positioning the sample with respect to an optical metrology device, a reference chip for the optical metrology device, the reference chip being movable to various positions with respect to the optical metrology device, and a reference chip purge device provides a flow of purge gas or air over the reference chip while the reference chip is in the various positions. The reference chip purge device may be static or movable with the reference chip.
Public/Granted literature
- US20160033399A1 OPTICAL METROLOGY WITH PURGED REFERENCE CHIP Public/Granted day:2016-02-04
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