Invention Grant
- Patent Title: Isolation regions for semiconductor structures and methods of forming the same
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Application No.: US15224778Application Date: 2016-08-01
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Publication No.: US10083856B2Publication Date: 2018-09-25
- Inventor: Chan-Hong Chern , Chun-Lin Tsai , Mark Chen , King-Yuen Wong
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/00 ; H01L21/762 ; H01L29/20 ; H01L29/205 ; H01L29/778 ; H01L29/06 ; H01L27/06 ; H01L29/66 ; H01L21/8252

Abstract:
Semiconductor structures including isolation regions and methods of forming the same are provided. A first layer is formed over a substrate, where the first layer comprises a semiconductor material. First and second trenches are etched, with each of the first and second trenches extending through the first layer and into the substrate. A wet etchant is introduced into the trenches, and the wet etchant etches a first opening below the first trench and a second opening below the second trench. Each of the first and second openings extends laterally below the first layer. The first and second openings are separated by a portion of the substrate adjoining the first and second openings. An oxidation process is performed to oxidize the portion of the substrate adjoining the first and second openings. An insulating material is deposited that fills the openings and the trenches.
Public/Granted literature
- US20180033682A1 ISOLATION REGIONS FOR SEMICONDUCTOR STRUCTURES AND METHODS OF FORMING THE SAME Public/Granted day:2018-02-01
Information query
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