Invention Grant
- Patent Title: Heterojunction semiconductor device for reducing parasitic capacitance
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Application No.: US15297123Application Date: 2016-10-18
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Publication No.: US10084076B2Publication Date: 2018-09-25
- Inventor: Li-Fan Lin , Chun-Chieh Yang , Wen-Chia Liao , Ching-Chuan Shiue , Shih-Peng Chen
- Applicant: DELTA ELECTRONICS, INC.
- Applicant Address: TW Taoyuan
- Assignee: DELTA ELECTRONICS, INC.
- Current Assignee: DELTA ELECTRONICS, INC.
- Current Assignee Address: TW Taoyuan
- Agency: CKC & Partners Co., Ltd.
- Priority: TW102132512 20130910; TW103106659 20140227; TW103114340 20140421
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L29/778 ; H01L23/00 ; H01L23/495 ; H01L29/40 ; H01L29/417 ; H01L29/423 ; H01L29/20 ; H01L23/31 ; H01L23/535 ; H01L29/205 ; H01L23/522 ; H01L23/528
Abstract:
A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, an interlayer dielectric, an inter-source layer, an inter-source plug, an inter-drain layer, an inter-drain plug, an inter-gate layer, and an inter-gate plug. The active layer is made of III-V group semiconductors. The source electrode, the drain electrode, and the gate electrode are disposed on the active layer. The gate electrode is disposed between the source electrode and the drain electrode. The interlayer dielectric covers the source electrode, the drain electrode, and the gate electrode. The inter-source layer, the inter-drain layer, and the inter-gate layer are disposed on the interlayer dielectric. The inter-source plug is electrically connected to the source electrode and the inter-source layer. The inter-drain plug is electrically connected to the drain electrode and the inter-drain layer. The inter-gate plug is electrically connected to the gate electrode and the inter-gate layer.
Public/Granted literature
- US20170040444A1 Semiconductor Device and Semiconductor Device Package Using the Same Public/Granted day:2017-02-09
Information query
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