- Patent Title: Memory system for multi-block erase and operating method thereof
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Application No.: US15406261Application Date: 2017-01-13
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Publication No.: US10089020B2Publication Date: 2018-10-02
- Inventor: Jong-Min Lee
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2016-0055453 20160504
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/02 ; G11C16/16 ; G11C16/10 ; G11C16/14 ; G11C16/34 ; G11C16/32

Abstract:
A memory system may include a memory device including a plurality of pages which include a plurality of memory cells coupled with a plurality of word lines and are stored with data, a plurality of memory blocks in which the pages are included, a plurality of planes which include the memory blocks, and a plurality of memory dies in which the planes are included; and a controller suitable for performing a program operation corresponding to a write command received from a host, at a first point of time, for first memory blocks among the memory blocks, checking program information for the program operation at the first point of time, predicting erase information on the memory blocks in correspondence to the program information, performing an erase operation for second memory blocks among the memory blocks, at a second point of time after the first point of time, in correspondence to the erase information, and performing the program operation for the second memory blocks at a third point of time after the second point of time.
Public/Granted literature
- US20170322849A1 MEMORY SYSTEM AND OPERATING METHOD THEREOF Public/Granted day:2017-11-09
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