Invention Grant
- Patent Title: Memory system
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Application No.: US15262324Application Date: 2016-09-12
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Publication No.: US10089241B2Publication Date: 2018-10-02
- Inventor: Tokumasa Hara , Osamu Torii , Kiichi Tachi , Susumu Tamon , Shigefumi Irieda , Juan Shi , Hironori Uchikawa , Kejen Lin , Akira Yamaga
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Minato-ku
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: G06F12/1009
- IPC: G06F12/1009

Abstract:
According to one embodiment, a controller writes either processed data or preprocessing data and flags into each page included in m pages. The processed data is data after first data translation of write data to be written into a relevant page. The preprocessing data is data before the first data translation of the write data to be written into the relevant page. Each of the flag at least represents whether or not the first data translation is performed for write data to be written into the relevant page.
Public/Granted literature
- US20170262379A1 MEMORY SYSTEM Public/Granted day:2017-09-14
Information query
IPC分类: