Invention Grant
- Patent Title: Packaging optoelectronic components and CMOS circuitry using silicon-on-insulator substrates for photonics applications
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Application No.: US15788960Application Date: 2017-10-20
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Publication No.: US10090286B2Publication Date: 2018-10-02
- Inventor: Russell A. Budd , Mounir Meghelli , Jason Scott Orcutt , Jean-Olivier Plouchart
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Ryan, Mason & Lewis, LLP
- Agent Vazken Alexanian
- Main IPC: G02B6/42
- IPC: G02B6/42 ; H01L25/16 ; G02B6/34 ; G02B6/124 ; G02B6/122 ; H01S5/022 ; H01S5/024 ; H01L21/48 ; H01L21/84 ; H01L23/367 ; H01L23/498 ; H01L27/12 ; H01L25/00 ; G02B6/132 ; H01L25/11 ; H01L23/58 ; H01L23/485 ; H01S5/183 ; H01S5/10 ; H01S5/02 ; G02B6/12 ; H01S5/026

Abstract:
Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
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