Invention Grant
- Patent Title: Biased transistor module
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Application No.: US15619694Application Date: 2017-06-12
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Publication No.: US10090295B2Publication Date: 2018-10-02
- Inventor: Jozef Reinerus Maria Bergervoet , Gerben Willem de Jong , Gian Hoogzaad
- Applicant: NXP B.V.
- Applicant Address: NL Eindhoven
- Assignee: NXP B.V.
- Current Assignee: NXP B.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP16177378 20160630
- Main IPC: H03F3/04
- IPC: H03F3/04 ; H01L27/06 ; H03K19/088 ; G11C11/412 ; H03K3/356

Abstract:
A biased-transistor-module comprising: a module-input-terminal; a module-output-terminal; a reference-terminal; a module-supply-terminal configured to receive a supply voltage; a module-reference-voltage-terminal configured to receive a module reference voltage; a main-transistor having a main-control-terminal, a main-first-conduction-channel-terminal and a main-second-conduction-channel-terminal, wherein the main-first-conduction-channel-terminal is connected to the module-output-terminal, and the main-second-conduction-channel-terminal is connected to the reference-terminal, and the main-control-terminal is connected to an input-signal-node, wherein the input-signal-node is connected to the module-input-terminal; and a bias-circuit. The bias-circuit comprises: a first-bias-transistor; a first-bias-resistor; a second-bias-transistor; and a second-bias-resistor.
Public/Granted literature
- US20180006021A1 BIASED TRANSISTOR MODULE Public/Granted day:2018-01-04
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