A decoding apparatus includes an input power estimating circuit, an error correction decoder and a controller. The input power estimating circuit generates multiple estimated input powers for multiple sets of data included in a packet that needs to be corrected, and calculates respective power differences between the multiple estimated input powers and a reference power. The controller determines one or multiple candidate error positions according to one of the multiple power differences that is higher than a predetermined threshold. The error correction decoder performs a decoding process on the packet according to the one or multiple candidate error positions.