Invention Grant
- Patent Title: Semiconductor device and current limiting method
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Application No.: US14934744Application Date: 2015-11-06
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Publication No.: US10103539B2Publication Date: 2018-10-16
- Inventor: Morio Iwamizu , Shigeyuki Takeuchi
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki-Shi
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki-Shi
- Agency: Rabin & Berdo, P.C.
- Priority: JP2014-254868 20141217
- Main IPC: H02H9/08
- IPC: H02H9/08 ; H02H9/02 ; H03K17/082

Abstract:
A semiconductor device, including a main transistor configured to supply power from a power source to a load, and a current limiting device including a control transistor. The current limiting device is configured to detect that the current flowing from the main transistor is an overcurrent, and to limit the current upon determining that the current is equal to or greater than a current limit value, and an operating voltage of the control transistor is equal to or greater than a current limiting activation voltage. The current limit value is a threshold for determining whether the current is greater than an operating current of the main transistor for the load to operate in a steady state. The current limiting activation voltage is a sum of a correction voltage and a predetermined threshold voltage at the gate of the control transistor when the current rises to the current limit value.
Public/Granted literature
- US20160181792A1 SEMICONDUCTOR DEVICE AND CURRENT LIMITING METHOD Public/Granted day:2016-06-23
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