Invention Grant
- Patent Title: Error correction decoding apparatus
-
Application No.: US15037031Application Date: 2014-11-07
-
Publication No.: US10103750B2Publication Date: 2018-10-16
- Inventor: Kenya Sugihara , Wataru Matsumoto , Hideo Yoshida , Yoshikuni Miyata
- Applicant: MITSUBISHI ELECTRIC CORPORATION
- Applicant Address: JP Tokyo
- Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: JP2013-253952 20131209
- International Application: PCT/JP2014/079602 WO 20141107
- International Announcement: WO2015/087643 WO 20150618
- Main IPC: H03M13/00
- IPC: H03M13/00 ; H03M13/11 ; H03M13/29 ; H03M13/39

Abstract:
An error correction decoding apparatus includes column operators 201 and row operators 211 to 213 provided respectively in accordance with the columns and rows of a check matrix of an LDPC code. A received LLR (log-likelihood ratio) of a received sequence is input into the column operators 201 together with row LLRs from the row operators 211 to 213, whereupon the column operators 201 calculate a total value z1 of the received LLR of the received sequence and the row LLRs from the row operators 211 to 213. The row operators 211 to 213 hold operation results relating to row LLRs or column LLRs obtained during a previous operation, calculate column LLRs using the total value input from the column operators 201 and the held operation results, calculate row LLRs from the calculated column LLRs, and output the calculated row LLRs to the column operators 201.
Public/Granted literature
- US20160294415A1 ERROR CORRECTION DECODING APPARATUS Public/Granted day:2016-10-06
Information query
IPC分类: