Invention Grant
- Patent Title: Wiring substrate and manufacturing method of wiring substrate
-
Application No.: US15278798Application Date: 2016-09-28
-
Publication No.: US10109571B2Publication Date: 2018-10-23
- Inventor: Kei Fukui , Kazuya Arai , Koji Komemura , Kazuhiko Iijima , Kenichiro Abe , Shinji Rokuhara , Shuichi Oka
- Applicant: FUJITSU LIMITED , SONY CORPORATION
- Applicant Address: JP Kawasaki JP Tokyo
- Assignee: FUJITSU LIMITED,SONY CORPORATION
- Current Assignee: FUJITSU LIMITED,SONY CORPORATION
- Current Assignee Address: JP Kawasaki JP Tokyo
- Agency: Staas & Halsey LLP
- Priority: JP2015-199256 20151007
- Main IPC: H05K1/00
- IPC: H05K1/00 ; H05K1/18 ; H05K7/00 ; H01L23/498 ; H01L21/48 ; H01L21/683 ; H05K1/02 ; H05K1/09 ; H05K1/11 ; H05K3/00 ; H05K3/02 ; H05K3/40 ; H05K3/46 ; H05K1/14 ; H05K3/42 ; H05K1/16
Abstract:
A wiring substrate includes a laminated sheet including a first conductor pattern, an inorganic dielectric layer, and a second conductor pattern. The first conductor pattern, the inorganic dielectric layer, and the second conductor pattern are laminated in this order. Also, the first conductor pattern is divided into a plurality of regions.
Public/Granted literature
- US20170103944A1 WIRING SUBSTRATE AND MANUFACTURING METHOD OF WIRING SUBSTRATE Public/Granted day:2017-04-13
Information query
