Invention Grant
- Patent Title: Semiconductor device with an isolation structure coupled to a cover of the semiconductor device
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Application No.: US15136326Application Date: 2016-04-22
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Publication No.: US10109594B2Publication Date: 2018-10-23
- Inventor: Lakshminarayan Viswanathan , Michael E. Watts , David F. Abdo
- Applicant: Freescale Semiconductor, Inc.
- Applicant Address: US TX Austin
- Assignee: NXP USA, INC.
- Current Assignee: NXP USA, INC.
- Current Assignee Address: US TX Austin
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L23/057 ; H01L23/66 ; H01L21/52 ; H01L23/053 ; H01L23/538 ; H01L23/58 ; H01L25/065 ; H01L25/00 ; H03F1/02 ; H03F3/195 ; H03F3/21 ; H03F3/213 ; H01L23/00

Abstract:
A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling are presented. The semiconductor device is formed on a substrate. A cover is affixed to the substrate so as to extend over the semiconductor device. An isolation structure of electrically conductive material is coupled to the cover in between components of the semiconductor device, with the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. In one version, the isolation structure includes a first leg extending from a ground connection along a side wall of the cover to a cross member contiguous with a primary cover wall that extends over the semiconductor device between the components to be isolated electromagnetically.
Public/Granted literature
- US20160240488A1 SEMICONDUCTOR DEVICE WITH AN ISOLATION STRUCTURE COUPLED TO A COVER OF THE SEMICONDUCTOR DEVICE Public/Granted day:2016-08-18
Information query
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