Invention Grant
- Patent Title: Semiconductor device and manufacturing method of the semiconductor device
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Application No.: US15417242Application Date: 2017-01-27
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Publication No.: US10128106B2Publication Date: 2018-11-13
- Inventor: Shinya Takashima , Katsunori Ueno , Masaharu Edo
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kanagawa
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kanagawa
- Priority: JP2016-050798 20160315
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/265 ; H01L21/324 ; H01L23/482 ; H01L29/20 ; H01L29/32 ; H01L29/66 ; H01L29/78 ; H01L29/872 ; H01L29/36 ; H01L29/06

Abstract:
When a defect region is present near the pn junction in a GaN layer, lattice defects are present in the depletion layer. Therefore, when a reverse bias is applied to the pn junction, the defects in the depletion layer cause the generated current to flow as a leakage current. The leakage current flowing through the depletion layer can cause a decrease in the withstand voltage at the pn junction. Provided is a semiconductor device using gallium nitride, including a gallium nitride layer including an n-type region. The gallium nitride layer includes a first p-type well region and a second p-type well region that is provided on at least a portion of the first p-type well region and has a peak region with a higher p-type impurity concentration than the first p-type well region.
Public/Granted literature
- US20170271148A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE Public/Granted day:2017-09-21
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