Invention Grant
- Patent Title: Substrate design with balanced metal and solder resist density
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Application No.: US15226246Application Date: 2016-08-02
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Publication No.: US10128195B2Publication Date: 2018-11-13
- Inventor: Yu-Wei Lin , Guan-Yu Chen , Yu-Min Liang , Tin-Hao Kuo , Chen-Shien Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H05K1/18
- IPC: H05K1/18 ; H01L23/00 ; H01L23/498 ; H01L23/13

Abstract:
A package includes a package substrate, which includes a middle layer selected from the group consisting of a core and a middle metal layer, a top metal layer overlying the middle layer, and a bottom metal layer underlying the middle layer. All metal layers overlying the middle layer have a first total metal density that is equal to a sum of all densities of all metal layers over the middle layer. All metal layers underlying the middle layer have a second total metal density that is equal to a sum of all densities of all metal layers under the middle layer. An absolute value of a difference between the first total metal density and the second total metal density is lower than about 0.1.
Public/Granted literature
- US20160365322A1 Substrate Design with Balanced Metal and Solder Resist Density Public/Granted day:2016-12-15
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