Invention Grant
- Patent Title: Semiconductor packages with pillar and bump structures
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Application No.: US14674891Application Date: 2015-03-31
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Publication No.: US10128207B2Publication Date: 2018-11-13
- Inventor: Yun Liu , Jerome Teysseyre , Yonggang Jin
- Applicant: STMicroelectronics Pte Ltd
- Applicant Address: SG Singapore
- Assignee: STMICROELECTRONICS PTE LTD
- Current Assignee: STMICROELECTRONICS PTE LTD
- Current Assignee Address: SG Singapore
- Agency: Seed Intellectual Property Law Group LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L23/00 ; H01L23/31 ; H01L21/78

Abstract:
One or more embodiments are directed to semiconductor packages that include a pillar and bump structures. The semiconductor packages include a die that has recess at a perimeter of the semiconductor die. The semiconductor package includes an encapsulation layer that is located over the semiconductor die filling the recess and surrounding side surfaces of the pillars. The package may be formed on a wafer with a plurality of die and may be singulated into a plurality of packages.
Public/Granted literature
- US20160293559A1 SEMICONDUCTOR PACKAGES WITH PILLAR AND BUMP STRUCTURES Public/Granted day:2016-10-06
Information query
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