A thin-film transistor (TFT) array substrate including at least one TFT, the at least one TFT including a semiconductor layer including a source region and a drain region having a first doping concentration on a substrate, a channel region between the source and drain regions and having a second doping concentration, the second doping concentration being lower than the first doping concentration, and a non-doping region extending from the source and drain regions; a gate insulating layer on the semiconductor layer; a gate electrode on the gate insulating layer and at least partially overlapping the channel region; and a source electrode and a drain electrode insulated from the gate electrode and electrically connected to the source region and the drain region, respectively.