Invention Grant
- Patent Title: Method and power semiconductor device having an insulating region arranged in an edge termination region
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Application No.: US15199135Application Date: 2016-06-30
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Publication No.: US10134845B2Publication Date: 2018-11-20
- Inventor: Hans-Joachim Schulze , Franz Hirler , Anton Mauder
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L21/02 ; H01L21/22 ; H01L29/36 ; H01L29/66 ; H01L29/739 ; H01L29/78 ; H01L21/324 ; H01L29/861 ; H01L21/306 ; H01L29/74 ; H01L29/778 ; H01L29/808 ; H01L29/40 ; H01L29/417 ; H01L29/06 ; H01L29/08
Abstract:
A power semiconductor device includes a semiconductor body having first and second opposing sides and an edge termination region arranged between an active region and an outer rim. The semiconductor body further includes a first doping region in the active region and connected to a first electrode arranged on the first side of the semiconductor body, a second doping region in the active region and the edge termination region and connected to a second electrode arranged on the second side of the semiconductor body, a drift region between the first doping region and the second doping region, the drift region comprising a first portion adjacent to the first side of the semiconductor body and a second portion arranged between the first portion and the second doping region, and an insulating region arranged in the edge termination region between the second doping region and the first portion of the drift region.
Public/Granted literature
- US20160315150A1 Method and Power Semiconductor Device Having an Insulating Region Arranged in an Edge Termination Region Public/Granted day:2016-10-27
Information query
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