Invention Grant
- Patent Title: Memory system
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Application No.: US15703057Application Date: 2017-09-13
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Publication No.: US10141061B2Publication Date: 2018-11-27
- Inventor: Marie Takada , Masanobu Shirakawa , Tsukasa Tokutomi
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2017-059244 20170324
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/28 ; G11C16/08

Abstract:
According to one embodiment, a memory system includes a semiconductor memory and a controller. The semiconductor memory is configured to execute a first to third read operations. In the first read operation, a first voltage is applied to a selected word line. In the second read operation, a second voltage different from the first voltage and a third voltage are applied to the selected word line. In the third read operation, a fourth voltage different from the first to third voltages and a fifth voltage are applied to the selected word line. An absolute value of a difference between the second voltage and the fourth voltage is different from an absolute value of a difference between the third voltage and the fifth voltage.
Public/Granted literature
- US20180277228A1 MEMORY SYSTEM Public/Granted day:2018-09-27
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