Invention Grant
- Patent Title: Semiconductor layered device with data bus
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Application No.: US15468742Application Date: 2017-03-24
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Publication No.: US10146719B2Publication Date: 2018-12-04
- Inventor: Chikara Kondo , Akinori Funahashi
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G11C7/10 ; H03M13/29 ; G11C29/12 ; G11C29/36

Abstract:
Apparatuses and methods of data communication between semiconductor chips are described. An example apparatus includes: a first die including a first switch circuit that receives a plurality of data signals, and further provides the plurality of data signals to a plurality of corresponding first ports among a plurality of first data ports and a first data redundancy port; and a second die including a second switch circuit that receives the plurality of data signals from the first die at a plurality of corresponding second ports among a plurality of second data ports and a second data redundancy port and further provides the plurality of data signals to a memory array.
Public/Granted literature
- US20180277175A1 SEMICONDUCTOR LAYERED DEVICE WITH DATA BUS Public/Granted day:2018-09-27
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