Invention Grant
- Patent Title: Memory device and method for manufacturing same
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Application No.: US15649784Application Date: 2017-07-14
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Publication No.: US10153296B2Publication Date: 2018-12-11
- Inventor: Naoyuki Iida , Hideki Inokuma , Naoki Yamamoto , Yoshihiro Yanai
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L27/11582 ; H01L23/528 ; H01L21/311 ; H01L27/11565 ; H01L27/11575 ; H01L27/11524

Abstract:
A memory device includes a substrate and a stacked body arranged along a first direction. The stacked body includes electrode films. A configuration of an end portion in a second direction of the stacked body is a staircase configuration. Steps corresponding to the electrode films are formed in the staircase configuration. A first distance between a first step and an end edge of the stacked body in the second direction is shorter than a second distance between a second step and the end edge in the second direction. The first step is positioned at an end portion in a third direction of the stacked body. The second step is positioned at a central portion in the third direction of the stacked body. The first and second steps correspond to two of the electrode films positioned at the same level when counting along the first direction from the substrate side.
Public/Granted literature
- US20180247955A1 MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2018-08-30
Information query
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