Invention Grant
- Patent Title: Methods and structures for a split gate memory cell structure
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Application No.: US15413449Application Date: 2017-01-24
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Publication No.: US10153349B2Publication Date: 2018-12-11
- Inventor: Cheong Min Hong , Sung-Taeg Kang
- Applicant: NXP USA, INC.
- Applicant Address: US TX Austin
- Assignee: NXP USA, Inc.
- Current Assignee: NXP USA, Inc.
- Current Assignee Address: US TX Austin
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/66 ; H01L21/28 ; H01L27/105 ; H01L27/11536 ; H01L29/788 ; H01L21/285 ; H01L29/45

Abstract:
A method of forming a split gate memory cell structure using a substrate includes forming a gate stack comprising a select gate and a dielectric portion overlying the select gate. A charge storage layer is formed over the substrate including over the gate stack. A first sidewall spacer of conductive material is formed along a first sidewall of the gate stack extending past a top of the select gate. A second sidewall spacer of dielectric material is formed along the first sidewall on the first sidewall spacer. A portion of the first sidewall spacer is silicided using the second sidewall spacer as a mask whereby silicide does not extend to the charge storage layer.
Public/Granted literature
- US20170194444A1 METHODS AND STRUCTURES FOR A SPLIT GATE MEMORY CELL STRUCTURE Public/Granted day:2017-07-06
Information query
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