Invention Grant
- Patent Title: Memory device
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Application No.: US15703456Application Date: 2017-09-13
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Publication No.: US10157655B2Publication Date: 2018-12-18
- Inventor: Yorinobu Fujino , Kosuke Hatsuda , Yoshiaki Osada
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Holtz, Holtz & Volek PC
- Priority: JP2017-059583 20170324; JP2017-153565 20170808
- Main IPC: G11C11/16
- IPC: G11C11/16

Abstract:
According to one embodiment, a memory device includes a memory cell; and a first circuit configured to perform first read for the memory cell and generate a first voltage, write first data to the memory cell that has undergone the first read, perform second read for the memory cell to which the first data written and generate a second voltage, generate a first current based on the first voltage, generate a second current based on the second voltage, and add a third current to one of the first current and the second current, thereby determining data stored in the memory cell at the time of the first read.
Public/Granted literature
- US20180277188A1 MEMORY DEVICE Public/Granted day:2018-09-27
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