A nonvolatile memory device may include a plurality of cell strings including a plurality of memory cells serially coupled to one another; a plurality of bit lines coupled to a corresponding cell string of the plurality of cell strings; a plurality of page buffers each including a plurality of latches and coupled to a corresponding bit line of the plurality of bit lines; a first control circuit suitable for controlling the plurality of latches to perform an operation corresponding to an activated command signal of a plurality of command signals in an access operation; and a second control circuit suitable for activating one or more of the plurality of command signals, while controlling operations of the plurality of cell strings and the plurality of bit lines in the access operation.