- Patent Title: Testing a semiconductor device including a voltage detection circuit and temperature detection circuit that can be used to generate read assist and/or write assist in an SRAM circuit portion and method therefor
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Application No.: US15628593Application Date: 2017-06-20
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Publication No.: US10163524B2Publication Date: 2018-12-25
- Inventor: Darryl G. Walker
- Applicant: Darryl G. Walker
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C29/12 ; G11C7/22 ; H01L29/78
Abstract:
A semiconductor device that has a normal mode of operation and a test mode of operation and can include: a first circuit that generates at least one assist signal having an assist enable logic level in the normal mode of operation, the at least one assist signal alters a read operation or a write operation to a static random access memory (SRAM) cell of the semiconductor device as compared to read or write operations when the assist signal has an assist disable logic level; and the first circuit generates the at least one assist signal having the assist disable logic level in the test mode of operation.
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