- Patent Title: Trench MOSFET with depleted gate shield and method of manufacture
-
Application No.: US15205920Application Date: 2016-07-08
-
Publication No.: US10163639B2Publication Date: 2018-12-25
- Inventor: Patrick M. Shea
- Applicant: Great Wall Semiconductor Corporation
- Applicant Address: US AZ Tempe
- Assignee: Great Wall Semiconductor Corporation
- Current Assignee: Great Wall Semiconductor Corporation
- Current Assignee Address: US AZ Tempe
- Agency: Foley & Lardner LLP
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/40 ; H01L29/49 ; H01L29/78 ; H01L29/417 ; H01L29/66

Abstract:
A semiconductor device, method of manufacture of a semiconductor device, and electronic system are disclosed. For example, the semiconductor device includes at least one trench disposed in a semiconductor substrate of the semiconductor device, wherein the semiconductor substrate has a first conductivity type. The semiconductor device further includes a polysilicon depleted gate shield disposed in the at least one trench, wherein the polysilicon depleted gate shield has a second conductivity type. The semiconductor device also includes a drift region disposed in the semiconductor substrate adjacent to at least one sidewall of the at least one trench, wherein the drift region has the first conductivity type, and a polysilicon gate disposed over the depleted gate shield in the at least one trench.
Public/Granted literature
- US20170012111A1 TRENCH MOSFET WITH DEPLETED GATE SHIELD AND METHOD OF MANUFACTURE Public/Granted day:2017-01-12
Information query
IPC分类: