Invention Grant
- Patent Title: Semiconductor device having a stacked fin structure and manufacturing method thereof
-
Application No.: US15242155Application Date: 2016-08-19
-
Publication No.: US10163728B2Publication Date: 2018-12-25
- Inventor: Sheng-Chen Wang , Kai-Hsuan Lee , Sai-Hooi Yeong , Chia-Ta Yu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L21/8234 ; H01L29/66 ; H01L27/088 ; H01L29/165 ; H01L29/78 ; H01L27/092 ; H01L29/10 ; H01L21/02 ; H01L21/762

Abstract:
In manufacturing a semiconductor device, a stack of first and second semiconductor layers are formed. A fin structure is formed by patterning the first and second semiconductor layers. A cover layer is formed on a bottom part of the fin structure so as to cover side walls of the bottom portion of the fin structure and a bottom part of side walls of the upper portion of the fin structure. An insulating layer is formed so that the fin structure is embedded in the insulating layer. A part of the upper portion is removed so that an opening is formed in the insulating layer. A third semiconductor layer is formed in the opening on the remaining layer of the second semiconductor layer. The insulating layer is recessed so that a part of the third semiconductor layer is exposed from the insulating layer, and a gate structure is formed.
Public/Granted literature
- US20170125304A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2017-05-04
Information query
IPC分类: