Invention Grant
- Patent Title: Semiconductor device and manufacturing method of the same
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Application No.: US15582911Application Date: 2017-05-01
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Publication No.: US10163921B2Publication Date: 2018-12-25
- Inventor: Tatsuyoshi Mihara
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Koutou-ku, Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Koutou-ku, Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2016-111505 20160603
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L29/792 ; H01L29/06 ; H01L29/423 ; H01L27/11568 ; H01L21/28 ; H01L27/11573 ; H01L27/11575 ; H01L21/336 ; H01L29/78

Abstract:
To improve reliability of a semiconductor device, a control transistor and a memory transistor formed in a memory cell region are configured to have a double-gate structure, and a transistor formed in a peripheral circuit region is configured to have a triple-gate structure. For example, in the memory transistor, a gate insulating film formed by an ONO film is provided between a memory gate electrode and sidewalls of a fin, and an insulating film (a stacked film of a multilayer film of an insulating film/an oxide film and the ONO film) thicker than the ONO film is provided between the memory gate electrode and a top surface of the fin. This configuration can reduce concentration of an electric field onto a tip of the fin, so that deterioration of reliability of the ONO film can be prevented.
Public/Granted literature
- US20170352675A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME Public/Granted day:2017-12-07
Information query
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