Invention Grant
- Patent Title: Semiconductor device including an epitaxy region
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Application No.: US15457613Application Date: 2017-03-13
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Publication No.: US10164093B2Publication Date: 2018-12-25
- Inventor: Te-Jen Pan , Yu-Hsien Lin , Hsiang-Ku Shen , Wei-Han Fan , Yun Jing Lin , Yimin Huang , Tzu-Chung Wang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/78 ; H01L21/8238 ; H01L29/165 ; H01L29/66 ; H01L29/04 ; H01L29/06

Abstract:
An exemplary method includes forming a dummy gate structure over a substrate and forming a set of spacers adjacent to the dummy gate structure. The set of spacers includes spacer liners disposed on sidewalls of the dummy gate structure and main spacers disposed on the spacer liners. The spacer liners include silicon and carbon. The method further includes forming source/drain epitaxy regions over the substrate. The source/drain epitaxy regions are disposed adjacent to the set of spacers, such that the dummy gate structure is disposed between the source/drain epitaxy regions. The method further includes removing the main spacers after forming the source/drain epitaxy regions. The method further includes replacing the dummy gate structure with a gate structure, where the replacing includes removing the dummy gate structure to form a trench defined by the spacers liners, such that the gate structure is formed in the trench.
Public/Granted literature
- US20170186867A1 Semiconductor Device Including An Epitaxy Region Public/Granted day:2017-06-29
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