Invention Grant
- Patent Title: FinFET with doped isolation insulating layer
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Application No.: US14805450Application Date: 2015-07-21
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Publication No.: US10164095B2Publication Date: 2018-12-25
- Inventor: Cheng-Ta Wu , Ting-Chun Wang , Wei-Ming You , J. W. Wu
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/417 ; H01L29/66 ; H01L29/06 ; H01L21/265 ; H01L21/324
Abstract:
A method for manufacturing a semiconductor device is provided including forming one or more fins over a substrate and forming an isolation insulating layer over the one or more fins. A dopant is introduced into the isolation insulating layer. The isolation insulating layer containing the dopant is annealed, and a portion of the oxide layer is removed so as to expose a portion of the fins.
Public/Granted literature
- US10192985B2 FinFET with doped isolation insulating layer Public/Granted day:2019-01-29
Information query
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