Invention Grant
- Patent Title: Digital low dropout regulator and control method thereof
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Application No.: US15852330Application Date: 2017-12-22
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Publication No.: US10168719B2Publication Date: 2019-01-01
- Inventor: Xuehuan Feng , Pan Xu , Yongqian Li , Zhongyuan Wu
- Applicant: BOE TECHNOLOGY GROUP CO., LTD. , HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Applicant Address: CN Beijing CN Hefei, Anhui
- Assignee: BOE TECHNOLOGY GROUP CO., LTD.,HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Current Assignee: BOE TECHNOLOGY GROUP CO., LTD.,HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Current Assignee Address: CN Beijing CN Hefei, Anhui
- Agency: Foley & Lardner LLP
- Agent James F. Ewing; Paul M. H. Pua
- Priority: CN201710297513 20170428
- Main IPC: G05F1/575
- IPC: G05F1/575 ; G05F1/56 ; G05F1/563 ; H03K5/24 ; H03K21/02 ; H03K5/1534

Abstract:
The present invention provides a digital low dropout regulator and a control method thereof. The regulator comprises a voltage comparator, a counter, a decoder, a PMOSFET array and a divider. The voltage comparator receives an actual voltage output from the PMOSFET array through the positive input terminal, receives a reference voltage through the negative input terminal, and compares the actual voltage and the reference voltage to obtain a level signal. The divider calculates based on an output voltage pre-configured for a PMOSFET array and an actual voltage output by the PMOSFET array in at least two clock cycles to obtain a first value. The counter generates a control signal based on the level signal and the first value. The decoder receives the control signal transmitted by the counter and controlling the number of switched-on transistors, in the PMOSFET on a basis of the control signal.
Public/Granted literature
- US20180314283A1 DIGITAL LOW DROPOUT REGULATOR AND CONTROL METHOD THEREOF Public/Granted day:2018-11-01
Information query
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