Invention Grant
- Patent Title: System and method of interfacing co-processors and input/output devices via a main memory system
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Application No.: US15262462Application Date: 2016-09-12
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Publication No.: US10168954B2Publication Date: 2019-01-01
- Inventor: Michael L. Takefman , Maher Amer , Riccardo Badalone
- Applicant: Rambus Inc.
- Applicant Address: US CA Sunnyvale
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Lowenstein Sandler LLP
- Main IPC: G06F3/06
- IPC: G06F3/06 ; H03M13/27 ; H03M13/05 ; G06F11/10 ; G06F12/02 ; G06F12/06 ; G06F13/20 ; H04L9/06 ; G06F9/4401 ; G06F13/42 ; G06F13/40
Abstract:
A system for interfacing with a co-processor or input/output device is disclosed. According to one embodiment, the system includes a computer processing unit, a memory module, a memory bus that connects the computer processing unit and the the memory module, and a co-processing unit or input/output device, wherein the memory bus also connects the co-processing unit or input/output device to the computer processing unit.
Public/Granted literature
- US20160378404A1 SYSTEM AND METHOD OF INTERFACING CO-PROCESSORS AND INPUT/OUTPUT DEVICES VIA A MAIN MEMORY SYSTEM Public/Granted day:2016-12-29
Information query
