- Patent Title: Translation lookaside buffer purging with concurrent cache updates
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Application No.: US15790387Application Date: 2017-10-23
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Publication No.: US10169234B2Publication Date: 2019-01-01
- Inventor: Simon H. Friedmann , Markus Kaltenbach , Dietmar Schmunkamp , Johannes C. Reichart
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Edward J. Wixted, III
- Main IPC: G06F12/0811
- IPC: G06F12/0811 ; G06F12/1045

Abstract:
A method and computer processor performs a translation lookaside buffer (TLB) purge with concurrent cache updates. Each cache line contains a virtual address field and a data field. A TLB purge process performs operations for invalidating data in the primary cache memory which do not conform to the current state of the translation lookaside buffer. Whenever the TLB purge process and a cache update process perform a write operation to the primary cache memory concurrently, the write operation by the TLB purge process has no effect on the content of the primary cache memory and the cache update process overwrites a data field in a cache line of the primary cache memory but does not overwrite a virtual address field of said cache line. The translation lookaside buffer purge process is subsequently restored to an earlier state and restarted from the earlier state.
Public/Granted literature
- US20180349278A1 TRANSLATION LOOKASIDE BUFFER PURGING WITH CONCURRENT CACHE UPDATES Public/Granted day:2018-12-06
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