Invention Grant
- Patent Title: Variation-aware circuit simulation
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Application No.: US15439794Application Date: 2017-02-22
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Publication No.: US10169507B2Publication Date: 2019-01-01
- Inventor: Chin-Cheng Kuo , Wei-Yi Hu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
An integration circuit (IC) simulation method includes: (a) providing a design netlist of a system-level circuit, wherein the system-level circuit comprises a first sub-circuit; (b) providing a first behavior model that is determined based on an operation of the first sub-circuit, wherein the first behavior model is a function of one or more respective behavior-level parameters; (c) incorporating a first variation into each of the one or more behavior-level parameters of the first behavioral model; and (d) simulating the system-level circuit based on the one or more behavior-level parameters of the first behavior model that incorporates the first variation.
Public/Granted literature
- US20180150577A1 VARIATION-AWARE CIRCUIT SIMULATION Public/Granted day:2018-05-31
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