Invention Grant
- Patent Title: Multi-topology logic gates
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Application No.: US15301409Application Date: 2015-04-29
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Publication No.: US10169617B2Publication Date: 2019-01-01
- Inventor: Alexander Fish , Moshe Avital , Hadar Dagan , Osnat Keren
- Applicant: Bar-Ilan University
- Applicant Address: IL Ramat-Gan
- Assignee: Bar-Ilan University
- Current Assignee: Bar-Ilan University
- Current Assignee Address: IL Ramat-Gan
- International Application: PCT/IL2015/050446 WO 20150429
- International Announcement: WO2015/166496 WO 20151105
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F21/75 ; H03K19/177 ; G06F21/76

Abstract:
An RMTL gate includes at least two logic blocks, where at least one of the logic blocks operates in multiple modes. The respective logic block mode(s) are selected by a topology selector which applies mode control signals to the logic blocks in order to obtain a selected topology for logic circuit operation. RMTL logic gates may be cascaded and/or interconnected to form an RMTL logic circuit with multiple logic gates which may operate with dynamically varying topologies. Use of random, semi-random or specified control sequences may protect the logic circuit against security attacks.
Public/Granted literature
- US20170169220A1 MULTI-TOPOLOGY LOGIC GATES Public/Granted day:2017-06-15
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