Invention Grant
- Patent Title: Stacked capacitor with enhanced capacitance
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Application No.: US15861435Application Date: 2018-01-03
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Publication No.: US10170539B2Publication Date: 2019-01-01
- Inventor: Szu-Yu Wang , Yeur-Luen Tu , Chih-Yu Lai
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
- Current Assignee Address: TW Hsinchu
- Agency: WPAT, P.C., Intellectual Property Attorneys
- Agent Anthony King
- Main IPC: H01L49/02
- IPC: H01L49/02 ; H01L23/522

Abstract:
A semiconductor device is provided. The semiconductor device includes a semiconductor substrate, a stacked structure and contact vias. The stacked structure includes a plurality of conductive layers, and two adjacent conductive layers are isolated from each other with at least one dielectric layer. The contact vias have different heights, and partially through the stacked structure. Each of the plurality of contact vias is electrically connected to a corresponding conductive layer.
Public/Granted literature
- US20180145128A1 SEMICONDUCTOR DEVICE Public/Granted day:2018-05-24
Information query
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