Invention Grant
- Patent Title: Method for forming flash memory unit
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Application No.: US15872998Application Date: 2018-01-17
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Publication No.: US10170597B2Publication Date: 2019-01-01
- Inventor: Anxing Shen , Chih-Kuang Lin
- Applicant: Integrated Silicon Solution (Shanghai), Inc.
- Applicant Address: CN Pudong New Area, Shanghai
- Assignee: Integrated Silicon Solution (Shanghai), Inc.
- Current Assignee: Integrated Silicon Solution (Shanghai), Inc.
- Current Assignee Address: CN Pudong New Area, Shanghai
- Agency: Jun He Law Offices P.C.
- Agent James J. Zhu
- Priority: CN201710188415 20170327
- Main IPC: H01L21/04
- IPC: H01L21/04 ; H01L29/66 ; H01L29/78 ; H01L29/423 ; H01L27/11543 ; H01L27/11558 ; H01L27/11541

Abstract:
A method for forming flash memory units is provided. After a logic gate in a select gate PMOS transistor area is separated from a logic gate in a control gate PMOS transistor area, P-type impurities implanted into the logic gate in the select gate PMOS transistor area are diffused into an N-type floating gate polysilicon layer to convert the N-type floating gate into a P-type floating gate by a subsequent high temperature heating process, so that it is possible to successfully form a select gate PMOS transistor having a small surface channel threshold value in a 55 nm process flash memory unit, and achieve mass production. Further, a two-step growth process of the logic gate and a process for separating the logic gate can form a surface channel of the select gate PMOS transistor having a smaller threshold value without affecting the floating gate doping of the control gate PMOS transistor.
Public/Granted literature
- US20180277664A1 METHOD FOR FORMING FLASH MEMORY UNIT Public/Granted day:2018-09-27
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