Invention Grant
- Patent Title: Internal spacer formation from selective oxidation for Fin-first wire-last replacement gate-all-around nanowire FET
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Application No.: US14948509Application Date: 2015-11-23
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Publication No.: US10170609B2Publication Date: 2019-01-01
- Inventor: Szu-Lin Cheng , Michael A. Guillorn , Gen P. Lauer , Isaac Lauer
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/775 ; H01L29/786 ; H01L29/423 ; H01L29/66 ; H01L29/10 ; H01L29/40 ; H01L29/78

Abstract:
A semiconductor device includes a first source/drain region a second source/drain region, and a gate region interposed between the first and second source/drain regions. At least one nanowire has a first end anchored to the first source/drain region and an opposing second end anchored to the second source/drain region such that the nanowire is suspended above the wafer in the gate region. At least one gate electrode is in the gate region. The gate electrode contacts an entire surface of the nanowire to define a gate-all-around configuration. At least one pair of oxidized spacers surrounds the at least one gate electrode to electrically isolate the at least one gate electrode from the first and second source/drain regions.
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