Invention Grant
- Patent Title: Slew rate locked loop
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Application No.: US15459498Application Date: 2017-03-15
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Publication No.: US10171093B2Publication Date: 2019-01-01
- Inventor: Himamshu Gopalakrishna Khasnis , Sujith Kumar Nagaraj
- Applicant: Signalchip Innovations Private Limited
- Agency: The Law Office of Austin Bonderer, PC
- Agent Austin Bonderer
- Priority: IN201641009007 20160315
- Main IPC: H03L7/06
- IPC: H03L7/06 ; H03L7/093 ; H03K19/003

Abstract:
A method of controlling and maintaining a constant slew rate at an output of a buffer is provided. The method includes the following steps: (a) receiving, (i) a first input signal and (ii) at least one of a control voltage using the buffer; (b) generating a threshold voltage using a first reference voltage generator; (c) comparing (i) the threshold voltage with an output of the buffer using at least one of a comparator; (d) determining a phase difference using a phase detector; (e) producing a DC voltage using a loop filter; (f) generating a reference voltage; (g) receiving the DC voltage and the reference voltage using an amplifier; (h) amplifying the difference between (a) said DC voltage, and (b) the reference voltage to obtain a control voltage using the amplifier; and (i) feeding the control voltage to the buffer.
Public/Granted literature
- US20170272086A1 SLEW RATE LOCKED LOOP Public/Granted day:2017-09-21
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